This invention relates to solving linear matrices in integrated circuit devices, and particularly in programmable integrated circuit devices such as programmable logic devices (PLDs).
Certain linear matrix equations may take the form RW=Z, where each of R, W and Z is a matrix and W contains the unknowns. This problem decomposes into a group of linear equations involving multiplication of elements of W by elements of R. To solve for the elements of W thus requires division by the elements of R. However, for some matrices, such as a 4×4 matrix typically found in an LTE application, implementing a divide operation in circuitry may consume as much resources as the remainder of the datapath combined. Moreover, latency through the divider can be greater than the latency through the remainder of the datapath.